A Survey on Different Multiplier Techniques

International Journal of Electronics and Communication Engineering

© 2016 by SSRG - IJECE Journal

Volume 3 Issue 3

Year of Publication : 2016

Authors : Y.RamaLakshmanna, G.V.S.Padma Rao, N . Udaya Kumar and K. Bala Sindhuri

10.14445/23488549/IJECE-V3I3P103

How to Cite?

Y.RamaLakshmanna, G.V.S.Padma Rao, N . Udaya Kumar and K. Bala Sindhuri, "A Survey on Different Multiplier Techniques," SSRG International Journal of Electronics and Communication Engineering, vol. 3,  no. 3, pp. 8-11, 2016. Crossref, https://doi.org/10.14445/23488549/IJECE-V3I3P103

Abstract:

 A multiplier has a significant role in various arithmetic operations in digital processing applications which include digital filtering, digital communications and spectral analysis. With the advancement in semiconductor technology, chip density and operating frequency are increasing, so the power consumption in VLSI circuits has become a major problem of consideration. Rapidly growing technology has raised demands for fast and efficient real time digital signal processing applications. A large number of multiplier designs have been developed to enhance their speed. This paper presents a study on some important multiplier techniques.

Keywords:

  Multiplier, Vedic Mathematics; Wallace Tree.

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