Fault Tolerant Parallel Filter in Digital Communication Systems

International Journal of Electronics and Communication Engineering

© 2017 by SSRG - IJECE Journal

Volume 4 Issue 9

Year of Publication : 2017

Authors : Jyotishma Bharti and Tarana Afrin Chandel

10.14445/23488549/IJECE-V4I9P101

How to Cite?

Jyotishma Bharti and Tarana Afrin Chandel, "Fault Tolerant Parallel Filter in Digital Communication Systems," SSRG International Journal of Electronics and Communication Engineering, vol. 4,  no. 9, pp. 1-3, 2017. Crossref, https://doi.org/10.14445/23488549/IJECE-V4I9P101

Abstract:

There are various types of filters are used by Digital signal processing (DSP) applications. In which digital parallel FIR filters are very widely used in numerous application. Over the years, many implementation techniques of digital FIR filter for DSP application has exploited the various practical difficulties such as low speed, high delay and above of all fault tolerance. Due to the VLSI complexity scaling, there are many complex systems that embed with many filters. The filters operations in those complex systems are usually parallel. As filters are the unit that comes in any type of communication system ranging from simple voice data to complex real-time data conversation. So it is then mandatory to implement some technique that shows the fault tolerance achieved in parallel filters. In this paper, we are going through various ideas that show that parallel filters can be protected using error correction codes (ECCs).

Keywords:

Error Correction Codes (ECC), Digital Signal Processing (DSP), Finite Impulse Response (FIR) Parallel FIR, Very Large Scale Integration (VLSI).

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