Call for Paper - Upcoming Issues

Implementation of Efficient FIR Filter using Distributed Arithmetic

International Journal of Electronics and Communication Engineering
© 2014 by SSRG - IJECE Journal
Volume 1 Issue 8
Year of Publication : 2014
Authors : C.K.Bagyasri
10.14445/23488549/IJECE-V1I8P104
pdf
How to Cite?

C.K.Bagyasri, "Implementation of Efficient FIR Filter using Distributed Arithmetic," SSRG International Journal of Electronics and Communication Engineering, vol. 1,  no. 8, pp. 6-10, 2014. Crossref, https://doi.org/10.14445/23488549/IJECE-V1I8P104

Abstract:

This paper describes an architecture for efficient implementation of FIR filter using distributed arithmetic(DA).In the proposed system the through put rate is increased by using parallel lookup table (LUT) update and weight update update operations. The conventional adder-based shift accumulation for DAbased inner-product computation is replaced by conditional signed carry-save accumulation in order to reduce the sampling period and area complexity. By using a fast bit clock for carry-save accumulation reduction of power consumption is achieved. It involves the same number of multiplexers, smaller LUT, and nearly half the number of adders compared to the existing DA-based design.

Keywords:

Adaptive filter, circuit optimization, distributed arithmetic (DA), least mean square (LMS) algorithm.

References:

[1] S. Haykin and B. Widrow, Least-Mean-Square Adaptive Filters. Hoboken, NJ, USA: Wiley, 2003.
[2] S. A. White, “Applications of the distributed arithmetic to digital signal processing: A tutorial review,” IEEE ASSP Mag., vol. 6, no. 3, pp. 4–19, Jul. 1989.
[3] D. J. Allred, H. Yoo, V. Krishnan, W. Huang, and D. V. Anderson, “LMS adaptive filters using distributed arithmetic for high throughput,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 7, pp. 1327–1337, Jul. 2005.
[4] R. Guo and L. S. DeBrunner, “Two high-performance adaptive filter implementation schemes using distributed arithmetic,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, no. 9, pp. 600–604, Sep. 2011.
[5] R. Guo and L. S. DeBrunner, “A novel adaptive filter implementation scheme using distributed arithmetic,” in Proc. Asilomar Conf. Signals, Syst., Comput., Nov. 2011, pp. 160–164.
[6] P. K. Meher and S. Y. Park, “High-throughput pipelined realization of adaptive FIR filter based on distributed arithmetic,” in VLSI Symp. Tech. Dig., Oct. 2011, pp. 428–433.
[7] M. D. Meyer and P. Agrawal, “A modular pipelined implementation of a delayed LMS transversal adaptive filter,” in Proc. IEEE Int. Symp. Circuits Syst., May 1990, pp. 1943–1946.
[8] K.K. Parhi, “VLSI Digital Signal Processing Systems: Design and Implementation,” John Wiley, 1999.