Minimal Realizations of Logic Functions

International Journal of Electronics and Communication Engineering

© 2021 by SSRG - IJECE Journal

Volume 8 Issue 1

Year of Publication : 2021

Authors : T S Rathore

10.14445/23488549/IJECE-V8I1P105

How to Cite?

T S Rathore, "Minimal Realizations of Logic Functions," SSRG International Journal of Electronics and Communication Engineering, vol. 8,  no. 1, pp. 24-27, 2021. Crossref, https://doi.org/10.14445/23488549/IJECE-V8I1P105

Abstract:

In the conventional method, a truth table (TT) is prepared from the specified logic function. Then it is expressed as the sum of minterms corresponding to the rows in which 1 appears. Finally, this function is further reduced using the Boolean identities. Thus, all the simplifications are concentrated at one place after the TT. This procedure does not always lead to minimal realization. This paper deals with the minimal realization of the logic function using TT in which TT is reduced successively by one variable at a time till all the variables are exhausted. Instead, the simplification is carried out at the end of the TT at the end of each step of TT reduction. The method is shown to be systematic and leads to minimal function. It is simpler in operation than based on only Boolean identities, Karnaugh map, and Quine-McClusky methods and can handle any number of variables. It is explained with several examples. It is worth introducing as an improvement over the classical TT method in classroom teaching.

Keywords:

Minimal Realizations, Logic Functions, Truth Table Method, Digital Circuits

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