A Novel Extended Series Connected Switched Sources 13- Level RSC Multilevel Inverter with Modified Reduced Carrier PWM Technique

International Journal of Electronics and Communication Engineering

© 2025 by SSRG - IJECE Journal

Volume 12 Issue 1

Year of Publication : 2025

Authors : Rumana Abideen, Donapati Ramakrishna Reddy

10.14445/23488549/IJECE-V12I1P119

How to Cite?

Rumana Abideen, Donapati Ramakrishna Reddy, "A Novel Extended Series Connected Switched Sources 13- Level RSC Multilevel Inverter with Modified Reduced Carrier PWM Technique," SSRG International Journal of Electronics and Communication Engineering, vol. 12,  no. 1, pp. 245-256, 2025. Crossref, https://doi.org/10.14445/23488549/IJECE-V12I1P119

Abstract:

The foremost ambition of the present contribution is to propose a 13-level reduced switch count multilevel inverter with only eight power switches and three diodes suitable for electric vehicle applications. The necessity to reduce the size, expense, and intricacy of multilevel inverters has resulted in the creation of Reduced Switch Count multilevel inverters. The present work implements an Extended Series Connected Switched Sources topology which comprises eight semiconductor devices and three unequal voltage sources. The proposed configuration's ability to reduce the number of semiconductor devices offers a trifecta of advantages: lower costs, a more compact size, and decreased circuit complexity. These benefits not only enhance the practicality and efficiency of the design but also contribute to a more streamlined manufacturing process and improved end-user experience. The operating modes of the proposed topology have been carefully reviewed. The reported configuration is evaluated using a modified, reduced carrier pulse width modulation approach, which has improved the harmonic performance number of comparators, minimizes controller computational burden and produces a better line-voltage harmonic profile than the conventional reduced carrier scheme. To demonstrate the proposed design's improvements, an accurate assessment study with former 13-level topologies is performed, taking into account the number of Insulated Gate Bipolar Transistors, voltage levels, capacitors, total components, diodes, DC sources, and voltage gain. In conclusion, the viability, functionality, and consistency of the proposed layout are evaluated using simulation and hardware setup under various conditions such as load type, power factors, and modulation index variances.

Keywords:

Extended series connected switched sources, Reduced switch count multilevel inverter, Series-connected switched sources, Pulse width modulation, Insulated gate bipolar transistor, Modified reduced carrier pulse width modulation.

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