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Analysis of Cascaded H- Bridge Inverter and Minimization of Total Harmonic Distortion

International Journal of Electrical and Electronics Engineering
© 2014 by SSRG - IJEEE Journal
Volume 1 Issue 6
Year of Publication : 2014
Authors : P.Divya Jyothsna, S.Harinath
10.14445/23488379/IJEEE-V1I6P101
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How to Cite?

P.Divya Jyothsna, S.Harinath, "Analysis of Cascaded H- Bridge Inverter and Minimization of Total Harmonic Distortion," SSRG International Journal of Electrical and Electronics Engineering, vol. 1,  no. 6, pp. 1-5, 2014. Crossref, https://doi.org/10.14445/23488379/IJEEE-V1I6P101

Abstract:

  This paper projects the different levels of cascaded H-bridge inverters and the minimization of total harmonic distortion by increasing the levels. For triggering of the semiconductor devices used in the inverter level shifting pulse width modulation technique is used. Individually for each level inverter we have developed the switching circuit and also the inverter. The analysis of three level and five level cascaded H-bridge inverters is done in MATLAB/SIMULINK by applying level shifting PWM technique. The simulation results shows the improvement of output voltage waveform and reduction of the total harmonic distortion by increasing the levels in inverter.

Keywords:

Cascaded H-bridge inverter, Level shifting Pulse width Modulation.

References:

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