Failure Identification of Power Converter Circuit using LabVIEW myRIO

International Journal of Electrical and Electronics Engineering

© 2023 by SSRG - IJEEE Journal

Volume 10 Issue 1

Year of Publication : 2023

Authors : B. Aravind Balaji, S. Sasikumar, G. A. Rathy

10.14445/23488379/IJEEE-V10I1P110

How to Cite?

B. Aravind Balaji, S. Sasikumar, G. A. Rathy, "Failure Identification of Power Converter Circuit using LabVIEW myRIO," SSRG International Journal of Electrical and Electronics Engineering, vol. 10,  no. 1, pp. 106-116, 2023. Crossref, https://doi.org/10.14445/23488379/IJEEE-V10I1P110

Abstract:

Failure diagnosis in power converter circuits is challenging due to its non-linear device characteristics. The power switches and electrolytic capacitors are the two main components that cause power converter failure. Predictive strategies are needed to be developed upon detecting these failures at the earliest, preventing catastrophic damages from spreading throughout the circuit. Predictive strategies include failure detection and failure identification. This paper discusses the technique involved in power switches and electrolytic capacitor failure analysis in power converter circuits. Two state variables are considered, firstly, the inductor current for Open Circuit (OS) and Short Circuit (SC) failure in power transistors, and secondly, the Equivalent Series Resistance (ESR) value for electrolytic capacitor failure. The proposed technique is implemented in a boost converter circuit for evaluation. The inductor current is monitored using a micro current precision current transformer, providing the appropriate footprint to predict failure due to open Circuits and short circuits in the power switches at its earliest. It is diagnosed using the myRIO FPGA target device. The ESR value that varies concerning the degradation of the electrolytic capacitor is measured online using precise measurement equipment.

Keywords:

Fault diagnosis, Power switch, Inductor current, Electrolytic capacitor, Equivalent Series Resistance (ESR), myRIO FPGA Target.

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