Design and Analysis of 2.45 GHz LNA at 60 nm CMOS Technology for Healthcare Applications

International Journal of Electrical and Electronics Engineering
© 2024 by SSRG - IJEEE Journal
Volume 11 Issue 10
Year of Publication : 2024
Authors : Y. Santhosh Sri Kumaran, S. Poornachandra Kumar, P. Sathya
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Y. Santhosh Sri Kumaran, S. Poornachandra Kumar, P. Sathya, "Design and Analysis of 2.45 GHz LNA at 60 nm CMOS Technology for Healthcare Applications," SSRG International Journal of Electrical and Electronics Engineering, vol. 11,  no. 10, pp. 140-149, 2024. Crossref, https://doi.org/10.14445/23488379/IJEEE-V11I10P114

Abstract:

Low noise amplifiers are crucial for improving the sensitivity of receivers and maintaining signal integrity. Its primary function is to amplify weak signals received from antennas with minimal addition of noise. Using LNA on the receiver side enhances the overall performance of the communication system. This article presents the design and simulation of inductively degenerated common-source LNA at the frequency of 2.45 GHz. The proposed LNA is designed using three different topologies, Single Stage Cascode (SSC), Double Stage Cascode (DSC) and Differential Cascode (DIC), to analyze and identify the better-performing topology. The LNA is implemented with a 60 nm CMOS process. CMOS is used due to its low cost and easy integration. The proposed LNA is designed, and the Noise Figure and S parameters results of the proposed LNA are obtained using the QUCS software tool. The differential cascode topology is preferred comparatively for healthcare devices due to its precision, noise performance, and power efficiency. A unique advantage of the differential cascode topology is its superior common-mode noise rejection with high gain, which is particularly beneficial in environments with significant electrical noise. It is evident from the results that differential cascode topology provides comparatively better performance than the other two topologies. The differential cascode LNA achieves a Noise Figure (NF) of 0.0329dB, whereas an SSC of 438dB and DSC of 444dB. The input reflection coefficient of DIC is -0.559dB, whereas SSC is -5.44 e-13dB, and DSC is -5.42 e-13dB, the output reflection coefficient of DIC is 0dB, whereas SSC is -0.267dB, and DSC is -0.267dB and voltage gain of 67.8dB is achieved in DIC, whereas SSC is 231dB, and DSC is231dB at the operating frequency.

Keywords:

CMOS, Cascode, Common source, Differential, Low noise amplifier, Noise Figure, RF amplifier.

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