Application Task Mapping in Real Time Network on Chip Systems for Latency Optimization Using Bio Inspired Greedy Firefly Algorithm

International Journal of Electrical and Electronics Engineering
© 2024 by SSRG - IJEEE Journal
Volume 11 Issue 11
Year of Publication : 2024
Authors : Shweta Ashtekar, Kushal Tuckley
pdf
How to Cite?

Shweta Ashtekar, Kushal Tuckley, "Application Task Mapping in Real Time Network on Chip Systems for Latency Optimization Using Bio Inspired Greedy Firefly Algorithm," SSRG International Journal of Electrical and Electronics Engineering, vol. 11,  no. 11, pp. 295-305, 2024. Crossref, https://doi.org/10.14445/23488379/IJEEE-V11I11P128

Abstract:

Network on Chip (NoC) provides a communication framework within multiple cores in a heterogeneous computing ecosystem. While the execution of real time embedded applications like multimedia, data networks, and signal processing, mapping application tasks in NoC on appropriate cores is the most crucial, affecting overall performance and latency. This research proposes a nature-inspired metaheuristic Greedy Firefly Algorithm (GFF) for NoC, which combines the greedy approach with the firefly algorithm for mapping tasks. It is examined against three existing algorithms: NMAP, BB and Random algorithm using identical embedded traffic scenarios and simulation environment to establish the aptness of the suggested algorithm. The results of the GFF algorithm prove more efficient at higher traffic loads for applications such as PIP, MWD, CAVLC, MMS, VOPD, and E3S Consumer benchmarks and reduces average latency by almost 5 to 20% as well as increased throughput compared to other algorithms and is significant in critical applications. The simulator's generated dataset was subjected to an SVM ML model, which predicts how GFF is appropriate for the mentioned applications while considering minimal latency.

Keywords:

Network on chip, Application task mapping, Real time embedded applications, Metaheuristic, Nature inspired, Greedy Firefly algorithm (GFF), Latency optimization, SVM.

References:

[1] K. Paramasivam, “Network On-Chip and Its Research Challenges,” ICTACT Journal on Microelectronics, vol. 1, no. 2, pp. 83-87, 2015.
[CrossRef] [Google Scholar] [Publisher Link]
[2] Chawki Benchehida et al., “Memory-Processor Co-Scheduling for Real-Time Tasks on Network-On-Chip Manycore Architectures,” International Journal of High Performance Systems Architecture, vol. 11, no. 1, pp. 1-11, 2022.
[CrossRef] [Google Scholar] [Publisher Link]
[3] Djalila Belkebir, and Fateh Boutekkouk, “Two-Steps into Energy Consumption Optimisation Due to the Mapping of Multimedia Application to Network on Chip Architecture,” International Journal of Intelligent Systems Technologies and Applications, vol. 15, no. 4, pp. 353-378, 2016.
[CrossRef] [Google Scholar] [Publisher Link]
[4] Coskun Celik, and Cuneyt F. Bazlamacci, “Effect of Application Mapping on Network-on-Chip Performance,” 2012 20th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, Munich, Germany, pp. 465-472, 2012.
[CrossRef] [Google Scholar] [Publisher Link]
[5] Xin-She Yang, Nature-Inspired Metaheuristic Algorithm, 2nd ed., Luniver Press, Beckington, UK, 2010.
[Google Scholar] [Publisher Link]
[6] Sharoon Saleem et al., “A Survey on Dynamic Application Mapping Approaches for Real-Time Network-On-Chip-Based Platforms,” IEEE Acces, vol. 11, pp. 122694-122721, 2023.
[CrossRef] [Google Scholar] [Publisher Link]
[7] Pradip Kumar Sahu, and Santanu Chattopadhyay, “A Survey on Application Mapping Strategies for Network-on-Chip Design,” Journal of Systems Architecture, vol. 59, pp. 60-76, 2013.
[CrossRef] [Google Scholar] [Publisher Link]
[8] Cristinel Ababei, and Rajendra Katti, “Achieving Network on Chip Fault Tolerance by Adaptive Remapping,” 2009 IEEE International Symposium on Parallel & Distributed Processing, Rome, Italy, pp. 1-4, 2009.
[CrossRef] [Google Scholar] [Publisher Link]
[9] Amit Kumar Singh et al., “Run-Time Mapping of Multiple Communicating Tasks on MPSoC Platforms,” Procedia Computer Science, vol. 1, no. 1, pp. 1019-1026, 2010.
[CrossRef] [Google Scholar] [Publisher Link]
[10] Yang Ge, Qinru Qiu, and Qing Wu, “A Multi-Agent Framework for Thermal Aware Task Migration in Many-Core Systems,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 20, no. 10, pp. 1758-1771, 2012.
[CrossRef] [Google Scholar] [Publisher Link]
[11] Amit Kumar Singh et al., “Communication Aware Heuristics for Run-Time Task Mapping on NoC-Based MPSoC Platforms,” Journal of Systems Architecture, vol. 56, no. 7, pp. 242-255, 2010.
[CrossRef] [Google Scholar] [Publisher Link]
[12] Chen-Ling Chou, and Radu Marculescu, “Contention-Aware Application Mapping for Network-on-Chip Communication Architectures,” 2008 IEEE International Conference on Computer Design, Lake Tahoe, CA, pp. 164-169, 2008.
[CrossRef] [Google Scholar] [Publisher Link]
[13] A. Bender, “MILP Based Task Mapping for Heterogeneous Multiprocessor Systems,” Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, Geneva, Switzerland, pp. 190-197, 1996.
[CrossRef] [Google Scholar] [Publisher Link]
[14] Sarzamin Khan et al., “An Efficient Algorithm for Mapping Real Time Embedded Applications on NoC Architecture,” IEEE Access, vol. 6, pp. 16324-16335, 2018.
[CrossRef] [Google Scholar] [Publisher Link]
[15] Sourabh Katoch, Sumit Singh Chauhan, and Vijay Kumar, “A Review on Genetic Algorithm: Past, Present, and Future,” Multimedia Tools and Applications, vol. 80, pp. 8091-8126, 2021.
[CrossRef] [Google Scholar] [Publisher Link]
[16] J. Kennedy, and R. Eberhart, “Particle Swarm Optimisation,” Proceedings of ICNN'95 - International Conference on Neural Networks, Perth, WA, Australia, vol. 4, pp. 1942-1948, 1995.
[CrossRef] [Google Scholar] [Publisher Link]
[17] Seyedali Mirjalili, and Andrew Lewis, “The Whale Optimisation Algorithm,” Advances in Engineering Software, vol. 95, pp. 51-67, 2016.
[CrossRef] [Google Scholar] [Publisher Link]
[18] Muhammad Junaid Mohiz et al., “Application Mapping Using Cuckoo Search Optimisation with Lévy Flight for NoC-Based System,” IEEE Access, vol. 9, pp. 141778-141789, 2021.
[CrossRef] [Google Scholar] [Publisher Link]
[19] Bahador Boroumand, Elham Yaghoubi, and Behrang Barekatain, “An Enhanced Cost‑Aware Mapping Algorithm Based on Improved Shuffled Frog Leaping in Network on Chips,” The Journal of Supercomputing, vol. 77, pp. 498-522, 2021.
[CrossRef] [Google Scholar] [Publisher Link]
[20] Nidhi Anantharajaiah, Felix Knopf, and Juergen Becker, “Ant Colony Optimisation Based NoCs for Flexible Spatial Isolation in Mixed Criticality Systems,” 2021 IEEE 34th International System-on-Chip Conference (SOCC), Las Vegas, NV, USA, pp. 248-253, 2021.
[CrossRef] [Google Scholar] [Publisher Link]
[21] Jingcao Hu, and R. Marculescu, “Energy-Aware Mapping for Tile-Based NoC Architectures under Performance Constraints,” Proceedings of the 2003 Asia and South Pacific Design Automation Conference, Kitakyushu, Japan, pp. 233-239, 2003.[CrossRef] [Google Scholar] [Publisher Link]
[22] Anh T. Tran, and Bevan M. Baas, “Noctweak: A Highly Parameterizable Simulator for Early Exploration of Performance and Energy of Networks On-Chip,” Technical Report, VLSI Computation Lab, ECE Department, University of California, 2012. [Google Scholar] [Publisher Link]
[23] Xin-She Yang, “Firefly Algorithm, Levy Flights and Global Optimization,” Research and Development in Intelligent Systems XXVI, pp. 209-218, 2010.
[CrossRef] [Google Scholar] [Publisher Link]
[24] Surafel Luleseged Tilahun, and Hong Choon Ong, “Modified Firefly Algorithm,” Journal of Applied Mathematics, 2012.
[CrossRef] [Google Scholar] [Publisher Link]
[25] Débora Matos et al., “Reconfigurable Routers for Low Power andHigh Performance,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 19, no. 11, pp. 2045-2057, 2011.
[CrossRef] [Google Scholar] [Publisher Link]
[26] Waqar Amin et al., “HyDra: Hybrid Task Mapping Application Framework for NoC-Based MPSoCs,” IEEE Access, vol. 11, pp. 52309-52326, 2023.
[CrossRef] [Google Scholar] [Publisher Link]