Citation :

Sunita Shirahatti, Rajashekhar Shettar, "Design and Analysis of Reversible Logic based Forward and Reverse RNS Converters," International Journal of Electrical and Electronics Engineering, vol. 13, no. 6, pp. 78-90, 2026. Crossref, https://doi.org/10.14445/23488379/IJEEE-V13I6P106

Abstract

In this paper, Residue Number Systems (RNS) forward and reverse conversion structures for moduli set {2n+1, 2n, 2n-1} using reversible logic are presented. The conversion structures are based on arithmetic adders implemented using reversible logic without using any Lookup Tables. Among many power optimization methods, Reversible Logic (RL) is one of the emerging techniques used to build low-power arithmetic units. In this paper, the Reversible HNG gate and TKN gate are employed to implement different arithmetic adder structures, such as ripple carry adder, carry save adder, carry skip adder, parallel prefix adder, and multiplier. These arithmetic structures are used in the implementation of Forward and reverse converters. The Forward and Reverse converters are implemented and simulated in Cadence, and performance is analyzed for parameters area, delay, and power. The performance of reversible converters is compared with the conventional Forward and reverse converters. Experimental results shows that reversible logic implementation shows promising results in terms of power efficiency compared to conventional forward converter, as the dynamic range increases, and the carry save adder is the best suitable adder structure for the forward converter. The reversible CSA is approximately 35% smaller, 19% fewer gates, 32% lower power, and 22% faster than the conventional CSA. Reversible logic exploits the parallel nature of a CSA perfectly. The Reverse converters are also implemented using CRT and MRC methods using reversible gates and compared with the conventional implementations with respect to the area, delay, and power. The reversible gate implementation of CRT is approximately 2.3% slower than its conventional counterpart and 1.15% faster than the MRC method. CRT utilizes approximately 6.9 % less power with reversible gates compared to conventional gate implementation, and 1.1% less power compared to MRC, approximately.

Keywords

Chinese Remainder Theorem, HNG gate, Mixed Radix Conversion Reversible Logic (RL), Residue Number System, TKN gate.

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