Developed Cascaded Integrator for High Speed Wideband Frequency Variation

International Journal of VLSI & Signal Processing

© 2017 by SSRG - IJVSP Journal

Volume 4 Issue 3

Year of Publication : 2017

Authors : D.Jesuva betisa and S.Chelsea mery

10.14445/23942584/IJVSP-V4I5P102

How to Cite?

D.Jesuva betisa and S.Chelsea mery, "Developed Cascaded Integrator for High Speed Wideband Frequency Variation," SSRG International Journal of VLSI & Signal Processing, vol. 4,  no. 3, pp. 6-10, 2017. Crossref, https://doi.org/10.14445/23942584/IJVSP-V4I5P102

Abstract:

Today's SDR is rotating the hardware problems into software difficulties, around or the complete physical layer determinations are software certain. Digital down conversion (DDC) and Digital up conversion (DUC) is one of the core knowledges in SDR, as well as animportantcomponent of numerical intermediate frequency (IF) receiver system. Cascade Integrator Comb (CIC) strainers are expansively used in multi rate signal handling as a filter in similarly decimator (reduction in the assortment rate) and interpolator (increase in the sampling rate). When a wide band indication is to be quantityrehabilitated to a different clock frequency then different filter constructionsconsecutively at high clock rates are required. Normal FIR architectures and its substitutes fail to work at such high occurrences. Cascaded Integrator comb (CIC) destruction filter is respected to decrease the data sampling amountlevel in such high bandwidth requirements. In this paper a CIC filter, an improved class of linear filters is performed for digital up conversion (DUC) and digital down conversion (DDC) for capable transmission and reaction in Software Defined Radio (SDR) declaration system. In this project a full-fledged arithmetical down difference and digital up adaptationsocieties are developed in VHDL for FPGA established software defined radio needs. The CIC created architecture is executed in VHDL and will be tested on Xilinx FPGAs. All the components functionality is confirmed with Modalism simulator. Xilinx ISE devices are used for FPGA combination, Place & Route and timing exploration. Spartan 3E development board with Chip scope Pro Analyzer device is used for on-chip authentication.

Keywords:

 CIC Filter, Field Programmable Gate Array (FPGA), Decimator, Interpolator, Modalism and Chipscope

References:

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