Design of 2 GHz Integrator using Feedforward-Regulated Cascode Operational Transconductance Amplifier

International Journal of VLSI & Signal Processing

© 2017 by SSRG - IJVSP Journal

Volume 4 Issue 1

Year of Publication : 2017

Authors : Akhtara Afsana Ahmed, Ziree Ziree Daimary, Nirmal Rai, Rochan Banstola, Suman Das, Surya Prakash Tamang

10.14445/23942584/IJVSP-V4I1P102

How to Cite?

Akhtara Afsana Ahmed, Ziree Ziree Daimary, Nirmal Rai, Rochan Banstola, Suman Das, Surya Prakash Tamang, "Design of 2 GHz Integrator using Feedforward-Regulated Cascode Operational Transconductance Amplifier," SSRG International Journal of VLSI & Signal Processing, vol. 4,  no. 1, pp. 9-13, 2017. Crossref, https://doi.org/10.14445/23942584/IJVSP-V4I1P102

Abstract:

This paper demonstrates a design of 2 GHz integrator circuit using a feed forward-regulated cascode OTA. The design of integrator circuit using OP-AMP seldom works up to Mega-Hertz range. Operational Transconductance Amplifier, having an advantage of tuning the transconductance using external current source, finds huge amount of applications in the field of analog design. However there are very few OTAs that breaks the Giga-Hertz range, feed forward-regulated cascode OTA being one. This work utilizes the 10GHz bandwidth of feedforward OTA, to design an integrator circuit. Not only the range of frequency but this integrator design even has the advantage low power dissipation. The work is mathematically verified and the simulation results also depicts the accuracy of the design. This work is simulated in mentor graphics software and a layout has been designed in the MOSFET level.

Keywords:

OTA, Integrator, PLL, ADC.

References:

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